1.Placed in parallel with a voltage source, they limit current to a device. In series with a voltage source they make up a voltage divider.

2.The fifth band, when present, indicates the failure rate (in percentage) per 1000 hours of service. This is sometimes called the reliability factors.

3.Why is skew important? In high-speed systems, clock skew forms an important component of timing margin. A skew of 1 ns is a significant portion of a 15-ns cycle time. If the timing budget does not allow for skew, it is highly likely that the system will perform unreliably.

4.In today's designs, with clock rates over 100 MHz and rise times commonly 1 nanosecond (ns) or less, designers cannot ignore the role interconnections play in a logic design.

5.The faster clock rates and rise times increase both capacitive and inductive coupling effects, which makes cross talk problems greater. They also mean shorter time for reflections to decay before the data is clocked and read, which decreases the maximum line length that can be used for unterminated systems.